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TMV 25 - C.004 auditorium

AAU Energy

PhD Defence by Janus Dybdahl Meinert

"Modelling of layout parasitics influence on power electronic converters using finite element"

TMV 25 - C.004 auditorium

  • 14.10.2024 13:00 - 16:00

  • English

  • Hybrid

TMV 25 - C.004 auditorium

14.10.2024 13:00 - 16:00

English

Hybrid

AAU Energy

PhD Defence by Janus Dybdahl Meinert

"Modelling of layout parasitics influence on power electronic converters using finite element"

TMV 25 - C.004 auditorium

  • 14.10.2024 13:00 - 16:00

  • English

  • Hybrid

TMV 25 - C.004 auditorium

14.10.2024 13:00 - 16:00

English

Hybrid

Supervisor:
Stig Munk-Nielsen

Co-Supervisor:
Asger Bjørn Jørgensen, Szymon Beczkowski

Assessment Committee:
Pooya Davari(Chair)
Professor Jacek Rabkowski, Warsaw University of Technology
Dr. Ing. Wulf-Toke, Franke, Danfoss Drives

Moderator:
Pooya Davari

Abstract:

The European Union has agreed upon a net-zero emission by 2050 to minimize the consequences of the climate changes caused by the overwhelming consumption of fossil fuels. Electrification of society is essential to meet the goal and power electronics hereby plays a vital role in amongst others the integration of renewable energy sources and efficient electrical energy conversion between generation and the end consumer using power electronics converters. The emerging wide bandgap semiconductor devices such as silicon carbide enable the design of higher efficient, faster switching converters and expand the fields within semiconductor based power converters can be applied such as radio frequency inductive heating. However, in order to achieve the faster switching transients when designing converters based on silicon carbide, study of layout and device parasitics and minimization of their effect on the converter performance is paramount.

This thesis presents a design exploration of the Class-E Push-Pull converter intended for radio frequency inductive heating. A modelling approach based on describing the converter using its governing differential equations is presented and an iterative solver is proposed for solving the initial value problem of the differential equations. This enables the modelling of the converter independent on the mode of operation. Using the proposed modelling approach the impact of layout and device parasitics on the converter performance is investigated for various designs.

A two-stage current sensor is presented which consists of an embedded current transformer and a Pearson current monitor. The current sensor is designed for measuring the individual die current and studying the current sharing between parallel dies inside multichip power modules. A bandwidth above 120MHz is demonstrated for the current sensor which is four times higher than the state of the art commercial Rogowski coil.

Lastly the measurement accuracy of the two-stage current sensor is investigated. Since its current transformer is embedded inside the power module, it is prone to be influenced by the electromagnetic interference of the layout parasitics. Undesired magnetic couplings are discovered between the layout and the current transformers which introduce a noise current to the die current measurements. Two mitigation strategies are proposed and demonstrated for the two-stage current sensor leading to an increased sensor accuracy.