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Pon 101 - 1.001/online

AAU Energy

PhD Defence Stefan Hoffmann

"Optimization strategies in public grid connected power electronic systems applying high pulse frequencies"

Pon 101 - 1.001/online

  • 10.09.2024 13:00 - 16:00

  • English

  • Hybrid

Pon 101 - 1.001/online

10.09.2024 13:00 - 16:0010.09.2024 13:00 - 16:00

English

Hybrid

AAU Energy

PhD Defence Stefan Hoffmann

"Optimization strategies in public grid connected power electronic systems applying high pulse frequencies"

Pon 101 - 1.001/online

  • 10.09.2024 13:00 - 16:00

  • English

  • Hybrid

Pon 101 - 1.001/online

10.09.2024 13:00 - 16:0010.09.2024 13:00 - 16:00

English

Hybrid

Supervisor:
Professor Eckart Hoene

Co-Supervisor:

Assessment Committee:
Pooya Davari (Chair)
Professor Marco Liserre, Kiel University, Germany
Professor Dennis Kampen, Hochschule Bremen City University of Applied Sciences, Germany

Moderator:
Saeed Peyghami

Abstract:

Although most electrical loads today operate based on direct current and voltage, the world is surrounded by alternating voltage grids for historical reasons. Changing the supply grids would be too complex and cost-intensive, so a rectifier is installed at the grid connection point of the corresponding electrical devices. With the change to renewable energy, the 230/400 V grid will not only include loads such as speed-controlled fans, and home electronics, but also a huge number of energy generation and storage systems in the power range from 500 W to 100 kW.
Due to the very high quantities required for green energy transition, there is great potential for optimizing AC-DC and DC-AC converters in the 230/400 V grid. On the one hand, the aim is to increase efficiency in order to minimize conversion losses. On the other hand, the power density is to be increased to save resources in the use of the required materials and thus reduce costs.
For the design of a power electronic converter, a huge number of component combinations, circuit topologies, control methods of the semiconductors, and switching frequencies are possible, which all fulfill the same specification according to the specific task. To optimize a power electronic system in terms of efficiency and power density, meaningful prediction models are therefore required for the overall system and the used components. This includes the electrical behavior (current and voltage waveforms), the losses occurring in the components, the EMC behavior, the volume and thermal behavior of the components depending on the topology, the control of the semiconductors and the operating parameters, such as input and output voltage, input and output current and switching frequency.
When optimizing a power electronic system, an efficiency-power density Pareto front arises when considering the huge number of design possibilities. The Pareto front represents the maximum power density for each possible efficiency value according to the conditions set in the design process.
One approach to increase efficiency and/or power density is to use semiconductor materials with a wide band gap (WBG semiconductors) instead of silicon-based semiconductors. Due to their significantly lower ratio of output and input capacitances to on-state resistance, they can be switched much faster and therefore with lower switching losses. This advantage is used to increase the switching frequency of the converters by factors and thus reduce the size of the passive energy storage devices (inductors and capacitors) because less energy needs to be stored temporarily during a switching period.
The challenges and research contributions of this PhD thesis result from the described and partly new general conditions.
Since the load conditions of the power electronic system are constantly changing due to the sinusoidal waveforms of current and voltage in the AC grid and the prediction of each operating point leads to very long calculation times due to the high switching frequencies, a methodology is suggested with which all required parameters can be predicted quickly and efficiently so that many possible combinations can be considered in a very short time. For example, in the Pareto front optimization on the PFC of the 63 kW motor drive investigated in this work, 25 million possible component combinations are calculated with a PC with standard computing power (Intel i9 core, 3.7 GHz, and 32 GB RAM) within a computing time of approx. 10 minutes, of which 1 million meet all requirements.
Another contribution involves measuring and predicting the switching losses in the WBG semiconductors. Their switching losses are partially so low that they can no longer be measured using the conventional double-pulse method. A new approach is developed with which the turn-on
and turn-off losses can be determined indirectly as a function of the switching current and the switching voltage by measuring the total losses of a circuit. In addition, a model is introduced using circuit simulation in the time domain, which enables the switching losses to be predicted using data sheet information alone. In addition to a model of the gate driver circuit, this requires the voltage-dependent semiconductor capacitances, the transfer characteristic, and the intrinsic gate resistance of the semiconductor under consideration.
Further contributions of this PhD thesis refer to the increase of the power density and/or efficiency by different control methods of the semiconductors. Detailed prediction models are developed and verified by measurement for the driving techniques of continuous, discontinuous, and triangular current modes. In addition, the advantages of the control methods of third harmonic injection and flat-top modulation are investigated and analyzed by measurement. Among other aspects, it is also studied how losses can be reduced by alternating between two current modes during a mains period, depending on the load condition. The influence of varying the switching frequency to reduce the average value of conducted EMC emissions is also investigated. The average and peak values of the interference must be predicted for this purpose.
The power density of a power electronic system can also be increased by novel circuit topologies. In this thesis, a novel CM filter of a motor drive with an active front end is proposed. The advantage of this topology is that there is only one voltage-absorbing common-mode choke for the PFC and the motor inverter, which only has to absorb the difference in the CM voltage-time areas of both converters.
The measures described in this work can significantly increase the power density and efficiency of the 63 kW system under investigation. Consequently, the PhD thesis provides an important contribution to the design of resource-saving and efficient power electronic converters