Wang, Rui

PhD student Rui Wang

PROJECT TITLE: Medium-voltage Three-level Converter Using Series Connected 10kV/15kV SiC MOSFET

PhD period: 2020.10.01 – 2023.09.30.
Section: Power Electronic Systems
Research Programme: Electronic Power Grid (E-Grid) 
Supervisor:  Stig Munk-Nielsen
Co-Supervisor: Christian Uhrenfeldt, Asger Bjørn Jørgensen, Philip Carne Kjær
Contact Information

Funding: China Scholarship Council (CSC)

ABSTRACT

Medium-voltage high-power converters are widely emerged in industries as the power demand continuously increasing. The topology design of such converters is greatly limited by the key power devices inside, of which fully controlled semiconductor devices such as Insulated Gate Bipolar Transistors (IGBTs) and Metal-Oxide-Semiconductor Field Transistors (MOSFETs) are very common. For relatively lower voltage, a three-level converter using Silicon (Si) IGBTs could be adopted and well qualified. However, for the circumstance of above 20kV DC link voltage, modular multilevel converters, cascaded converters, or thyristor based converters must be adopted to meet the high voltage requirement [1], which brings greater complexity to the design. With the development of Silicon Carbide (SiC) devices, traditional Silicon (Si) devices are gradually substituted by SiC ones due to the superior behaviours, and higher blocking voltage and higher working frequency of a single device are acquired. Nowadays 10kV/15kV SiC MOSFET module is well designed and built [2], in combination with series connection, it is feasible and valuable to design a simple three-level converter for applications with above 20kV DC output voltage.

Based on it, in this Ph.D. project, the self-powered gate driver for 10kV/15kV SiC MOSFET is planned to design, followed by a new voltage balance method of two series connected 10kV/15kV SiC MOSFETs. Finally, the goal is to make a three-level converter design using series connected 10kV/15kV SiC MOSFETs. During the whole process, digital frame work is planned to optimize PCB design before conducting the experiment. In this way, simulation results will be more consistent with experimental results, and the design period will be shortened. In the final stage of this Ph.D. project, such a three-level converter will be verified by a back-to-back way of one single phase, which will be built and tested in the power electronics laboratory at Aalborg University. The key findings and outcome of the project will be shared with partners, and are expected to contribute to the efforts in accelerating commercialization and adoption of medium-voltage three-level converter using series connected 10kV/15kV SiC MOSFETs in practical applications.

Papers

Publications in journals and conference papers may be found at VBN.